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The Dynamic Vedic Multiplier Implemented in FPGA for DSP Applications by K. Venkatesan, Gurumoorthy Vaithiyanathan, S. Sivaramakrishnan

The Dynamic Vedic Multiplier Implemented in FPGA for DSP Applications

K. Venkatesan, Gurumoorthy Vaithiyanathan, S. Sivaramakrishnan

56 pages • missing pub info (editions)

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