CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware Sram Design and Test by Andrei Pavlov, Manoj Sachdev

CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware Sram Design and Test

Frontiers in Electronic Testing

Andrei Pavlov, Manoj Sachdev

194 pages • missing pub info (editions)

nonfiction art computer science science technology medium-paced
Powered by AI (Beta)
Loading...

Description

The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design considerations to the growing process variations with associated test issues. Purpose: provide process-...

Read more

Community Reviews

Loading...

Content Warnings

Loading...