Frontiers in Electronic Testing

CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware Sram Design and Test by Andrei Pavlov, Manoj Sachdev

CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware Sram Design and Test

Frontiers in Electronic Testing

Andrei Pavlov, Manoj Sachdev

194 pages • missing pub info (editions)

nonfiction art computer science science technology medium-paced
Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits by José Pineda de Gyvez, Manoj Sachdev

Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits

Frontiers in Electronic Testing

José Pineda de Gyvez, Manoj Sachdev

328 pages • missing pub info (editions)

nonfiction art design technology informative medium-paced