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CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware Sram Design and Test by Manoj Sachdev, Andrei Pavlov

CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware Sram Design and Test

Frontiers in Electronic Testing

Manoj Sachdev, Andrei Pavlov

194 pages missing pub info (view editions)

nonfiction art computer science science technology medium-paced
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Description

The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design considerations to the growing process variations with associated test issues. Purpose: provide process-...

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